exynos-linux-stable/drivers/clk/socfpga
Yangtao Li 9b416f3d23 clk: socfpga: fix refcount leak
[ Upstream commit 7f9705beeb3759e69165e7aff588f6488ff6c1ac ]

The of_find_compatible_node() returns a node pointer with refcount
incremented, but there is the lack of use of the of_node_put() when
done. Add the missing of_node_put() to release the refcount.

Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Fixes: 5343325ff3 ("clk: socfpga: add a clock driver for the Arria 10 platform")
Fixes: a30d27ed73 ("clk: socfpga: fix clock driver for 3.15")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-01-29 10:24:07 +01:00
..
clk-gate-a10.c clk: socfpga: allow for multiple parents on Arria10 periph clocks 2016-02-22 14:17:37 -08:00
clk-gate.c clk: socfpga: switch to GENMASK() 2015-07-28 11:59:16 -07:00
clk-periph-a10.c clk: socfpga: allow for multiple parents on Arria10 periph clocks 2016-02-22 14:17:37 -08:00
clk-periph.c clk: socfpga: Add a second parent option for the dbg_base_clk 2015-08-24 16:49:03 -07:00
clk-pll-a10.c clk: socfpga: fix refcount leak 2020-01-29 10:24:07 +01:00
clk-pll.c clk: socfpga: fix refcount leak 2020-01-29 10:24:07 +01:00
clk.c clk: socfpga: add a clock driver for the Arria 10 platform 2015-05-21 15:16:04 -07:00
clk.h clk: socfpga: Add a second parent option for the dbg_base_clk 2015-08-24 16:49:03 -07:00
Makefile clk: socfpga: add a clock driver for the Arria 10 platform 2015-05-21 15:16:04 -07:00