ftrace/MIPS: Add MIPS64 support for C version of recordmcount
MIPS64 has 'weird' Elf64_Rel.r_info[1,2], which must be used instead of the generic Elf64_Rel.r_info, otherwise, the C version of recordmcount will not work for "segmentation fault". Usage of "union mips_r_info" and the functions MIPS64_r_sym() and MIPS64_r_info() written by Maciej W. Rozycki <macro@linux-mips.org> ---- [1] http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf [2] arch/mips/include/asm/module.h Tested-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: John Reiser <jreiser@BitWagon.com> Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> LKML-Reference: <AANLkTinwXjLAYACUfhLYaocHD_vBbiErLN3NjwN8JqSy@mail.gmail.com> LKML-Reference: <910dc2d5ae1ed042df4f96815fe4a433078d1c2a.1288176026.git.wuzhangjin@gmail.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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2 changed files with 71 additions and 4 deletions
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@ -217,6 +217,39 @@ is_mcounted_section_name(char const *const txtname)
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#define RECORD_MCOUNT_64
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#include "recordmcount.h"
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/* 64-bit EM_MIPS has weird ELF64_Rela.r_info.
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* http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf
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* We interpret Table 29 Relocation Operation (Elf64_Rel, Elf64_Rela) [p.40]
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* to imply the order of the members; the spec does not say so.
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* typedef unsigned char Elf64_Byte;
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* fails on MIPS64 because their <elf.h> already has it!
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*/
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typedef uint8_t myElf64_Byte; /* Type for a 8-bit quantity. */
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union mips_r_info {
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Elf64_Xword r_info;
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struct {
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Elf64_Word r_sym; /* Symbol index. */
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myElf64_Byte r_ssym; /* Special symbol. */
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myElf64_Byte r_type3; /* Third relocation. */
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myElf64_Byte r_type2; /* Second relocation. */
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myElf64_Byte r_type; /* First relocation. */
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} r_mips;
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};
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static uint64_t MIPS64_r_sym(Elf64_Rel const *rp)
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{
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return w(((union mips_r_info){ .r_info = rp->r_info }).r_mips.r_sym);
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}
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static void MIPS64_r_info(Elf64_Rel *const rp, unsigned sym, unsigned type)
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{
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rp->r_info = ((union mips_r_info){
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.r_mips = { .r_sym = w(sym), .r_type = type }
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}).r_info;
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}
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static void
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do_file(char const *const fname)
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{
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@ -268,6 +301,7 @@ do_file(char const *const fname)
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case EM_386: reltype = R_386_32; break;
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case EM_ARM: reltype = R_ARM_ABS32; break;
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case EM_IA_64: reltype = R_IA64_IMM64; gpfx = '_'; break;
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case EM_MIPS: /* reltype: e_class */ gpfx = '_'; break;
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case EM_PPC: reltype = R_PPC_ADDR32; gpfx = '_'; break;
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case EM_PPC64: reltype = R_PPC64_ADDR64; gpfx = '_'; break;
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case EM_S390: /* reltype: e_class */ gpfx = '_'; break;
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@ -291,6 +325,8 @@ do_file(char const *const fname)
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}
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if (EM_S390 == w2(ehdr->e_machine))
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reltype = R_390_32;
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if (EM_MIPS == w2(ehdr->e_machine))
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reltype = R_MIPS_32;
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do32(ehdr, fname, reltype);
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} break;
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case ELFCLASS64: {
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@ -303,6 +339,11 @@ do_file(char const *const fname)
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}
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if (EM_S390 == w2(ghdr->e_machine))
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reltype = R_390_64;
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if (EM_MIPS == w2(ghdr->e_machine)) {
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reltype = R_MIPS_64;
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Elf64_r_sym = MIPS64_r_sym;
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Elf64_r_info = MIPS64_r_info;
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}
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do64(ghdr, fname, reltype);
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} break;
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} /* end switch */
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